9.6.10
MICROWIND + DSCH COMPLETE WITH EXAMPLES ( Full Version with 6 metal layers)
MICROWIND supports entire front-end to back-end design flow.For front-end designing, we have DSCH (digital schematic editor) which posses in-built pattern based simulator for digital circuits. User can also build analog circuits and convert them into SPICE files and use 3rd party simulators like WinSpice or pSPICE.
DSCH can convert the digital circuits into Verilog file which can be further synthesized for FPGA/CPLD devices of any vendor. The same Verilog file can be compiled for layout conversion in MICROWIND.
The back-end design of circuits is supported by MICROWIND. User can design digital circuits and compile here using Verilog file. MICROWIND automatically generates a error free CMOS layout. Although this place-route is not optimized enough as we do not indulge in complex place & route algorithms.
User can also create CMOS layout of their own using compile one line Verilog syntax or custom build the layouts by manual drawing.
The CMOS layouts can be verified using inbuilt mix-signal simulator and analyzed further for DRC, crosstalks, delays, 2D cross section, 3D veiw, etc.
MICROWIND is truly integrated EDA software encompassing IC designs from concept to completion, enabling chip designers to design beyond their imagination. MICROWIND integrates traditionally separated front-end and back-end chip design into an integrated flow, accelerating the design cycle and reduced design complexities.
It tightly integrates mixed-signal implementation with digital implementation, circuit simulation, transistor-level extraction and verification – providing an innovative education initiative to help individuals to develop the skills needed for design positions in virtually every domain of IC industry.MICROWIND + DSCH COMPLETE WITH
EXAMPLES ( CLICK TO DOWNLOAD)
or
CLICK HERE TO DOWNLOAD – MICROWIND V3.1 only
MICROWIND LAYOUT TIPS
Tips on the finger Tips:
In this post we will be looking at various design optimization tips.
The courtesy to most of these tips are SSN sir. Thank you sir.
1. While drawing the layouts, its best practice to have a single Vdd/Vss rail running.
How do we do this?
Draw a simple metal rail. Give Vdd/Vss to it and tap it wherever you need.
So far we haven't come across this. But in the future layouts, we will be making use of this.
2. Avoid digging unnecessary wells.
Yeah its pretty simple for us to draw as many n well as possible. But implementing this at industry level is not possible. In industry they go for laying all p devices in a single n well. You may notice that we have used the same practice in design of Transmission Gate.
3. Avoid using poly for routing.
Though we have made use of poly for routing in design of TG, its not a good practice. Its better to use metal for this purpose. Use of metal will reduce resistance.
4. More tips will follow based upon inputs from experts.
MICROWIND Tutorial Part 7 : Design and Layout of D Flip Flop
The D flip flop shown above is very much different from what we have learnt so far. We have designed it using Nand nor or some other basic gates. But this is completely different.
You can also see that the circuit is like cascading of two similar blocks. Block one includes M1, M2 and the first 2 inverters. The rest of the circuit is the repetition of the first part.
Now, why all this unnecessary fuss? Just to make our life simple. If we draw the first part, then we just need to do our Ctrl+C and Ctrl+V to get the second part. As simple as that.
Back to business: As you can see in the schematic, the circuit involves only two basic elements. An nMOS and an inverter. Basically you need to draw only these two and half of your headache is over. (No kidding, I swear J )
step 1:
The first step is of course opening the Microwind.
Step 2:
From the palette click on the Moss generator and click Generate device. Check the lambda box (bottom right). Make the Width MOS equal to 4. Now click on Generate device. Click bindass at any place on the screen. We get an nMOS.
Step 3:
You can see that the clock which we are using is of two types. One is clk and the next is its complement. That is clk_bar. For that we need an extra inverter. (Other than the four visible). I won’t be showing you how to draw and inverter. You can refer to the previous tutorial to get the idea regarding that. We will be directly inserting it. (Cool eh?).
Go to file>Insert Layout. Browse to the previously drawn inverter and here you are.
You should be able to see the screen somewhat like this:
Insert another inverter. This is Inv 1. You can refer the schematic. This inverter is connected to the output of the nMOS M1.
We need to name them as we draw. This will make lesser confusions.
Step 4:
Half the work is over. The only thing that we need to do is placing them properly. Copying and pasting them on the right area in the right manner. You owe me a treat for this simplicity.
We will be drawing everything in a single well. This will reduce the delay and make it a best choice for the counters and register designs.
We need to take a little care now. Remember that we need to maintain a minimum of 4 lambda distance between adjacent metal rails.
So, be little careful while placing. Keep doing DRC at each step to make sure that you haven’t ended up doing it wrong.
The layouts placing:
- Place the Inverter for inverting the clock at extreme left. (It’s not visible in the schematic, but we need to draw it for inverting the clock and getting clk_bar.
- Now, everything else will be according to the schematic. Place a pass transistor, i.e. an nMOS (M1) at a distance of 4λ from the inverter.
- To the right of this MOS, we have another inverter named Inv 1. Place it at a distance of 4λ from it. Please make sure that all nMOS and pMOS are at the same level.
- The output of this Inv 1 inverter is connected to the input of Inv 2 inverter. So we need to place Inv 2 to the right of Inv 1 at a distance of 4λ. (If you are getting confused scroll up and see the schematic)
- The output of Inv2 is connected as input to pass transistor M2. So, place a pass transistor nMOS M2 to the right of Inv 2.
The intermediate file can be found here:
Step 5:
As you can make out, we have just done with placing. We need to connect the devices now. Also note that, we have not drawn the second half. Once we are done with the connection, we will duplicate first half. (Both first and the second stages are identical).
Follow this convention:
The vertical routing should be done with metal 2.
The horizontal routing to be done with metal 1.
Note that you should use Metal 1 to Metal 2 contact to connect to metal 1 and metal 2. (It can be found in the palette)
Care should be taken while connecting a polysilicon layer to metal 2 layers. A polysilicon layer cannot be connected to metal 2 layers directly. First, it has to be connected to metal 1. And then it has to be connected to metal 2.
With the above things in our mind, we will proceed with the connections.
After the connections, the layout will look somewhat like this.
You can even download this intermediate file and analyze it.
Step 6:
It’s time to go for stage 2. Copy the layout, just before first inverter and place it to the right of the existing layout.
This creates the second stage.
Again do the necessary connections and your layout is ready.
The final layout will look similar to this.
You can find the same over here:
The output waveforms looks like this:
You can cascade this layout in the manner you want and create various registers and counters.
Have a great time
MICROWIND Tutorial Part 6 : Design and VLSI layout of Schmitt Trigger circuit.
Schmitt Trigger. (Never omit the "c" and "t" from the name of this circuit).
Yes, very soon we are back with a hot tutorial on Schmitt trigger. As usual, we will be providing the layout and simulation waveforms. Some of them are really sleeping off by the time we are done with the explanation, so we are cutting short the explanation and just giving pictorial hints so that you can draw on your own. Reffer back to the previous tutorial incase you need some basic guidance.
Yes, very soon we are back with a hot tutorial on Schmitt trigger. As usual, we will be providing the layout and simulation waveforms. Some of them are really sleeping off by the time we are done with the explanation, so we are cutting short the explanation and just giving pictorial hints so that you can draw on your own. Reffer back to the previous tutorial incase you need some basic guidance.
In electronics, a Schmitt trigger is a comparator circuit that incorporates positive feedback.
When the input is higher than a certain chosen threshold, the output is high; when the input is below another (lower) chosen threshold, the output is low; when the input is between the two, the output retains its value. The trigger is so named because the output retains its value until the input changes sufficiently to trigger a change. This dual threshold action is called hysteresis, and implies that the Schmitt trigger has some memory. In fact, the Schmitt trigger is a bistable multivibrator.
Schmitt trigger devices are typically used in open loop configurations for noise immunity and closed loop positive feedback configurations to implement multivibrators.(Courtesy: Wikipedia)
You can read the entire article over here.
Here is the schematic. Please go through the schematic properly. The naming conventions used in the schematic(for naming the MOS devices) are retained in the layout for readability.
The desing is very simple. Using the MOS generator place few n and p device and provide proper routing.
Here is the explainatory layout of Schmitt Trigger Circuit:
The output waveforms (voltage vs time) can be observed as follows:
But we are less interested in this. We want to see the hysteresis curve. To viewe the hysteresis curve follow the instructions:
1. Click on Voltage vs Voltage at the bottom of the simulation screen. (Marked with red circle in the next figure)
2. Tick the Hysteresis right at the right corner of the screen. (Again it is highlighted in the next figure)
3. Click on Reset followed by More.
You are done with Schmitt Trigger and you should be able to see the hysteresis curve as follows.
Final Schmitt Trigger Layout:
Have a great time
MICROWIND Tutorial Part 5 : Three (3) Input NAND gate
The schematic and stick diagram of 3 input nand gate looks something like this:
Please post a comment if you want to know the working of the three input nand gate. I will be more than happy to explain.
Step by step layout for 3 input nand gate.
1. 1. Draw a single pMOS from MOS generator (available in palette)
2. 2. Select on units in lambda (underlined in the following figure) Keep the length as 2λ and width as 4λ.
3.
3. 3. Copy and place them side by side or just create two more pMOS
4. 4. Place them beside each other at a distance of 4λ.(refer figure). Note that we need to draw them in parallel, as shown in the schematic.
5. Now we need nMOS in series. You can of course use MOS generator and extend and draw the polysilicon sticks as shown below
6. 5. By this time we have 3 pmos and 3 nmos generated. Join the corresponding gates. Give Vcc and Vdd and the input signals.
7. The final diagram should look like one below.
8.
WWe are done again.
9. The waveforms observed are:
Have a great time.
MICROWIND Tutorial Part 4: Design, Layout and Application of CMOS Buffer
You can get a detailed idea of buffer here
Here is a logic diagram of buffer. As you can see, it is basically two inverters connected in series. This but obiviously results in no change in the output. (Complement of Complemented signal is the original signal). Then why use it?
Not all the time in a circuit we connect Vdd(Poser supply) to each and every node. This is because they dont need it. (because of the design). So, after a certain length of devices, the logic levels starts degrading. The high level starts reducing from that of Vdd value. Such a degradation causes noisy output and many error. Therefore the signal needs boosting. This boosting is provided by the buffer.
In few circuits, it can be used to hold the value of a signal for certain duration.
It is used and a separation element between two different circuitry to eliminate cross talk or unwanted noise.
Enough of applications? If you need more, comment to this article. I will be glad to post few more.
I will not be going in much detail regarding the layout of the buffer. You can reffer to part 2 (design of the inverter) to get a detailed design viewe of the inverter.
I will be just posting the steps and the final layout.
Step1: (Not open the favourite Microwind window..blah blah blah)
Make a copy of the inverter circuit which you have drawn. Open the copy Microwind>File>Open. Browse to the layout and open it.
You have got one inverter. We need the next one.
Step 2:
Shortcut 1: Import an inverter. Go to File>Insert Layout browse to the inverter and import it.
Shortcut 2: In the top menu, click on Copy element. Drag the mouse holding the left button over the layout till its completely selected. Release left mouse button. You should be able to see a dotted layout exactly same as the one you have just copied. Place it away. If you happen to commit a mistake, Ctrl+U will undo it. :). The recommended spacing between them is 7lambda. You may do DRC once to find the exact spacing.
Step3:
Routing:
Ahem. Forgot to write almost final step :). Yes, we are almost done (again).
Here we will be using Vdd and Vss for both the inverters. This is as good as supplying 2 power supplies. For example, we have a single UPS for the whole computer. This is like supplying separate UPS for monitor and CPU.
We are not that rich, or are we?:).
So, what we do is draw single rail at the top of the layout, and give a single Vdd to it. Later, we can tap Vdd from it. We do the same for Vss.
Now, we need to connect the output of the first inverter to the input of the second. This can be done in two ways. Using polysilicon (because the distance is less, if the distance is more, it introduces unnecessary patasitics) or using metal.
I have used metal. Connect the layers. Do the dew( I mean DRC). Thats it. The layout should look something like this:
Press the simulation button. You should get the waveforms as shown in the fugure. If you dont, check the contacts and debug it. All the best.
Have a cup of coffe and be ready for the next session.
See you soon.
Keep watching this space for more.
Have a nice day.
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