reg ISRO ........

                             1)12 bit ADC operating @ 1micro sec clock....conversion time....

correct ans : Successive approx
5) pulsed radar prob ;max range inc by factor
ans : 3
6)duty cycle problem
ans : .0015
7)least Power dissapation
ans: - CMOS
ans :voltage controlled device
9) adv of dpsk over psk

my ans :dpsk bit error rate is lower than psk

but de rite ans is DPSK receiver design is simple than PSK
10)Ideal current meter
ans:zero resistance

11) RLC problem...find I/V
ans : Cs/LCs^2+ RCs+1

15) alpha,beta are roots.....then.....
ans : 2

17)greatest negative no using 2 's complement....
ans : -128

20) T-ff characteristic equation
ans-- TQ+TQ

21)percentage modulation of AM
ans--100 %

22)approx noise equivalent temp.....
ans : 11.2 ( i din ans dis...)

23)differential amplifier to achieve

25) switch closed 2@ t=0...find valie of inductor..

26)op-amp ckt with 3 resistors @ input.....
ans : -9

27) given : s^2+4s+16=0; find resonant frequency.....
ans :4

29)line is open circuited...VSWR
ans: infinity

30) unit of relative permeability

31)f(x) = [tan x^2]

33)5 bit DAC has current output......
ans: 14.5mA

34) ehernet protocol

36) 8 bit microcontroller has external RAM wid memory form 8000H to 9FFFH....
no. of bytes
ans: - -- 8191

38)total power in modulted carrier,,,,
ans: 1.18KW

39) Y21 parameter....
ANS: -1/6

40) inductance if no. of turns doubled...

41) energy stored in inductor....
ans: 1.8J

42)Value of Q at !Mhz frequency....
ans:none of these
Apr 28 (6 days ago)
43)closed loop TF has poles at
ans: -2,-2

46)divergence of MAGNETIC FLUX
ans: 0

47) straight line n circle of radius a are given........length of chord.....

52)auto correlation of sinusoid....
ans : A^2/2 COS(WT)

53)source produces 4 symbols....efficieny of code...
ans:7/8 ( i din ans dis)

54)image frequency..
and:2910 Khz

57) equvalent resistance
ans: 100 ohms

58)Voltage across last resistor is V.....Vs is
ans : 8V

59)natural freuency of UFB contrl system....
ans: 3.16 rad/sec

64)Aman with n keys wants to open a lock...he tries his keys @ random...expected no of attempts for his sucess is

66) memory system of size 16K Bytes required to be designed using memory chips wid 12 addr n 4 data lines.,,,,,,,no of such chips..
ans : 4

67) 8085 program
ans : 7

68) JK FF has Tpd = 12ns.....largest MOD ...for 10Mhz freq
ans : 256

72)RLC series impedeance
ans: Sqrt(R^2 + (XL - XC)^2)

74)Moving coil ammeter may be compensated for freuency errors by...

80).lim xlogsin(x).......
ans :0

The paper was easy and tricky tooo!!! I attempted 53 and got 12 wrong...


Test Paper :8
 Paper Type     : Technical - Electronics
 Test Date        : 26  April  2009 
 Test Location  : Chennai
 Posted By        : Geet
Hello friends... I had applied for ISRO exam conducted on April'09 at Chennai. I belong to Electronics cadre and the test duration is 90 minutes (i.e) one and a half hours...
I just made a generalised preparation about all the topics suggested for the exam. Also my preparation was entirely theoritical but alas to my surprise problems were dominating in the paper. Out of 80 questions 45 were problems.
The theoritical questions were on ADC/DAC, memory devices(PLD,FPGA etc), Microcontrollers and Microprocessors(mainly their features based qns), logic families(TTL,ECL,CMOS etc), electronic devices(BJT, MOSFET, JFET, etc), PSKs tink it is polar shift keying, flipflop(must know A-Z abt tis topic), units of quantities lik permeability and so, slightly abt protocols(data commn), opamps and applications(inverted, noninverted, differentiator, integrator refer Roy chowdry), two port parameeters, antenna, measuring devices (lik ammeter, voltmeter, CT, PT), amplifiers and most importantly VSWR( voltage wave standing ratio) along wit probs. My paper contained 4 question on tis specific topic alone(12 marks).
Regarding problems finding value of resistance and equivalent resistance in an electrical N/W, expr for voltage in transient N/W, determing what kind of N/W is given, Q factor probs, probs on modulation(AM,FM,PM),probs on ADC/DAC, probs on opamps various config(to find o/p voltage), noise factor of antenna prob,Y parameter based probs, resonant ckt probs, probs on Zener diode(or any other diodes and transistors), antenna probs(bandwidth of reflector), basic intergration probs, probabability(minor, I had jus one qn), probs on flipflop n counters, microprocessr n controller probs(lik detr no of chips, loop execution usin a program, Byte storage n RAM),, fourier transform(inverse too) convolution prob, skin depth prob, jus one prob on matrix evaluvation(easy) and limit substitution prob complex conjugate and roots of eqn prob, probs on RADAR. Now here majority of probs were from control system(finding transfer fn, various frequency plots based prob, poles n zeros, resonant freq of a char eqn.) and lot of probs in inductance(value of inductance probs, enengy stored in L).
I was not shortlisted from the written test. Preparation has to b both theoritical n problematic. Electrical students are crippled due to qns from antenna while for electronic students its electrical networks since they would not hav dealt it in all sem. Time is a constraint in tis exam. Mostly the given duration will not b sufficient for completing the entire paper so try first to answer direct qns both theory n prob and then go for time consuming ones. This instruction will indeed b given in the qn paper itself. Remember 3 marks for one correct answer and a negative marking (1 mark) for each incorrect answer.
hello friends,
i hav attended the isro(electronics) exam on 16th july 2006, the pattern was:
all ques were technical only ece students will get the advantage ** no gk question
pattern=80 ques in 90 mns ,
15 ques (more) from digital(kmap,gates ,counter,numericals based on the time priod,ur basics will take you through)
ques from transmission line & em waves so read KD PRASAD(ANTENNAS, PROPAGATION)

        computer  science engineering

1) Special software to craete a job queue is called
a) driver
b) spooler
c) interpreter
d) linkage editer
2)When a process is rolled back as a result of deadlock the difficulty arises is
a) Starvation
b) System throughput
c) low device utilization
d) cycle stealing
3)On recieving an interrupt from an I/O device the CPU
a) Halts for a predefined time.
b) Branches off the interrupt service routine after completion off the current instruction.
c) Branches off to the interrupt service routine immediately.
d) hands over the control of address bus and data bus to the interrupting service.
4) Which of the following is true of the auto increment addressing mode?
1. It is useful in creating sef relocating code.
2)If it is induced in an instruction set architecture , than an additional ALU is required for effective address calculation.
3) The amount of increment depends on the size of the data item accessed.
a) 1 only.
b)2 only
c) 3 only
d) 2 and 3 only
5) Theprimary purpose of an operating system is
a) To make the most efficient use of the computer hardware.
b) to allow people to use the computer.
c) To make the system programmers employed.
d) to make computers easy to use.
6)consider the cpu intensive processes which require 10,20,30 time units and arrive at time 0,2,6 respectively.how many context switches are needed if the operating system impements a shortest remaining time first sceduling algorithm?Do not count the context switches at the time 0 and end.
a) 1
b) 2
c) 3
d) 4
7) consider a system having n resources of the same type.These resources are shared by 3 processes A,B,C .These have peak demands of 3,4,6 respectively.For what value of n deadlock won't occour.
a) 15
b) 9
c) 10
d) 13
8) In which addressing mode the effective address of the operand is computed by adding a constant value to the content of the register?
a) absolute mode.
b) indirect mode
c) immediate mode
d) index mode
9)the process of organizing the memory into two banks to allow 16 bit and 8 bit data operation is called
a) bank switching
b) indexed mapping
c) two way memory interleaving
d) memory segmentation
10)a one dimensional array A has indices 1-75.Each element is a string and takes up three memory words. The array is stored in location 1120 decimal. The starting address of A[49] is
a) 1267
b) 1164
c) 1264
d) 1169
11) The microsystems stored in the control memory of a processor have a width of 26 bits. Each microinstruction is divided into three fields : a microoperation field of 13 bits, a next address field(X), and a MUX select field(Y). There are 8 status bits in the inputs of the MUX.How many bits are there in the X and Y fields and what is the size of the control memory in number of words?
a) 10,3,1024
b) 8,5,256
c) 5,8,2048
d) 10,3,512
12)The use of multiple register windows with overlap causes a reduction in the number of memory accesses for
1.function locals and parameters
2. register saves and restores.
3. instruction fetches.
a) 1 only
b) 2 only
c) 3 only
d) 1,2,and 3
13)Which of the following about relative addressing mode is false?
a) it enables reduced instruction size.
b) it allows indexing of array element with same instruction.
c) it enabkles easy relocation of data.
d) it enables faster address calculation than absulute addressing.
14)Substitution of values for names (whose values are constants) is done in '
a) local optimization
b) loop optimization
c) constant folding
d) strength reduction
15)A root a of eq f(x)=0 can be computed to any degree of accuracy if a good initial approximation x0 is chosen for which
a) f(x0)>0
b) f(x0)f''(x0)>0
c) f(x0)f''(x0)<0
d) f''(x0)>0
16) consider the polynomial p(x)=a0+a1x+a2x*x+a3x*x*x. The mininum number of multipliations needed to evaluate p on an input x is
a) 3
b) 4
c) 6
d) 9
17)Activities which ensure that the software that has been built , is tracable tocustomer is covered as part of
a) verification
b) validation
c) maintainnace
d) modeling
18) A testing method which is normally used as the acceptance test for a software system is
a) regression testing
b) integration testing
c) unit testing
d) system testing
19)A locked database file cab be
a) accessed by only one user
b) modified by the users with the correct password.
c) used to hide the sencitive information.
d) updated by more than one user



Test Paper :20
 Paper Type     : Candidate Experiences
 Test Date        : 28  December  2008 
 Test Location  : Satyabhama, Chennai
 Posted By        : Murari
ISRO PAPER ON 28th DECEMBER AT CHENNAI                           
Written test pattern*  80 Questions
* 1:30 Hrs
* Each question carries 4 marks and 1 mark deduction for negative marking.
* All are Multipule choise

He touched all basics. Exam is some what easy and some what tough. They asked both types of questions. Examples are
1. What is characteristic gas constant
a) Cp / Cv     b) Cp*Cv   c) Cp-Cv   d) Cp+Cv
2. If three pipes are in series having dia 450,550 and 650, and thier diameters are 200,250,300 respectively. If we replaced the three pipes with equivalent pipe have length 750 mm then what could be the diameter of the equivalent pipe.
Ans: To solve this problem caluculator is necesssary. The formula is      Leqv/D5eqv = L1/D15+ L2/D25+ L3/D35    How we can calculate with out calculater.
3. A rod is subjected to 18000 Nm torque and max permissible shear stress is 60 N/mm2. Calculate the diameter of the Rod.
Ans: Torque T= (∏*D3*fs)/16
4. 10 questions are from Pshysics Ex: A car moving with a uniform acceleration covers 30mt in 5 sec. And next in  5 seconds covers 50 mt with another uniform acceleration. What is acceleration fo the car.
5. Only few qusetions from Thermodynamics ( i think 4).
6. What is the parallel flow heat exchanger and answer are with Symbols of Temperature diagrams.
7. No Apptitude and Reasoning.
8. Some questions are from Production, Heat Transfer, FM, Metrology.
9. They didn't touch Management questions.

Mostly all qusetions are from Basics. All the best for all who are intresetd to write ISRO and other compitative exams. Be prepair well. Presently Mechanical and Civil have good opportunities.So study well.


ISRO Sample Papers
  1. The minimum number of edges in a connected cyclic graph on n vertices is
     a) n-1 b) n c) n+1 d)none of these 
  2. A full binary tree with n non leaf nodes contains
     a) n nodes b) log n nodes c)2n-1 nodes d)2n nodes 
  3. The time complexity of shell sort  
     a) O(n) b) O(log n) c) O(n 1.2 ) d)O(n2) 
  4. The time taken to insert an element after an element pointed by some pointer  
     a) O(1) b) O(log n) c) O(n) d) O(nlogn) 
  5. what is the name given to the first generation computer?  
    a) Binary language b)Machine language c)Assembly language 
  6. The root directory of a disk should be placed  
    a) at a fixed address in main memory
    b) at a fixed location on disk
    c) anywhere on disk. 
  7. A top down parser generates
    a) right most derivation
    b) left most derivation
    c) right most derivation in reverse
    d) left most derivation in reverse 
  8. what is the name of the OS that reads and reacts in terms of actual time?
     a)batch system
     b)time sharing
     c)real time 
  9. FDDI is a
     a)ring network
     b)star network
     c)mesh network 
  10. Computer memory consists of
    d)all the above 

helo friends, i appeared for ISRO written examinatiom on 22april,2007 for the post of Scientist Engineer.
paper was totally technical.Questions which i remembered are as follows:-
1) output resistance of  ideal OP AMP is:-
a)  0     b)   1    c)   infinite   d)   very high                                                                ANS:  a)    0

2)  waveguide acts as:-
a)  LPF   b)   HPF   c)   BPF   d)   BRF                                                                  ANS:  b)   HPF

3) quality factor of series RLC ckt. increases with:-
a) increase in R  b)  decrease in R  c) doesn't depends on R   d) none of these         ANS: b) decrease in R.

4) energy stored in capacitor is given by:
a) CV     b)   0.5CV   c)  CV2    d)  0.5CV2                                                          ANS: d)    

5) CMRR of an OP AMP is given as 80db and Ad is 20000.Value of Acm  will be:-
a) 4   b)     8    c)     2    d)    1                                                                                 ANS: c)   2

some basic questions were based upon digital electronics,ckt. analysis,antenna theory,zener doides.
Archana Kumawat

1) Moore model of DFF?

2) Which of the following filter has steep roll-off characteristics?
(A) Butterworth filter (B) Chebyshev filter  (C) Bessel filter (D)--
ans: B

3)The architecture of DSP processor---------
(A) Havard (B) Von neumann (C)...(D)..
ans: A
4)If the input frequency to a 6 stage ripple counter is 1000MHz then output frequency at 6th stage_______
5)Minimum number of 2 input NAND gates required to realise the fn. AB'+CD'+EF'
ans: 6
6)What will exit() fn. in C will do?
7) go to command in C will cause the program to jump to----
ans: Label
8)VSWR is given then asked to find out reflection coefficient
9)The relation between power in FM signal and modulation index--------
10)If two signals are AM modulated with modulation indices of 0.3 and 0.4 what will be the modulation index of combined signal?
ans: Calculate using 1/M=(1/m1)+(1/m2)
11)If n stage pipelining is used in a processor, then what will be the speed improvement over non pipelined processor?
(A) same (B) n (C) n! (D) 2n
12)  One circuit is given (That was a Voltage Doubler using op-amp) and asked to Identify that...
13) Which one of the following memory has fastest write time?
(A) Flash (B) EEPROM (C) EPROM (D) None of these
14) In EEPROM data is stored in____
(A) Cross coupled Latch (B) Capacitor (C) floating gate transistor (D)--
15) Which technology is faster?
(A) Bipolar (B) MOS (C) CMOS (D) ..
16)Memory access time, cache access time , hit ratio are given, Asked to find out  Average memory access time
17) If the probability of getting a job for A is 1/3 and the probability of getting a job for B is 1/4 then the probability of getting a job for A or B will be____?
18)One transfer fn As4 + Bs3 + Cs2 +D=0 (I don't remember the values of A,B,C,D ) is given, Asked to find out whether the system is____
(A) Stable (B) Unstable (C) Marginally Stable
19) For implementing D flip flop using RS flip flop, the extra component needed is____
(A) AND gate (B) OR gate (C) NOT gate (D) NOR gate
20)The output of an 8 bit DAC is 1Volt when the input is 00110010, then the full scale output of the same DAC will be____
ans: 5.1 V  (Hint: 1/50*255)
21)Fastest ADC is___
(A) SAR (B) sigma- delta (C) flash (D)...
22)The operating point of Class-B amplifier will be at_____
(A) exactly at cut-off region (B) inside saturation region (C) inside cut-off region (D) middle of active region
23)For an N bit ADC , the number of comparators needed___
(A) N (B) 2N (C) 2N -1 (D) 2N-1
24)De-emphasis circuit is used for_______
ans: Attenuating high frequency components
25)The laplace transform of e-2t  _____
Ans: 1/(s+2)
26)The magnitude of 1+cos x+j sin x____
Ans: 2 cos (x/2)
27) A circuit is given in which the capacitor (1uF)  is initially charged to 12V , At t = 0, one switch is closed so that another capacitor of capacity 1.5uF comes in parallel with the first capacitor, then in steady state what will be the voltage across them? ( Visualize the circuit , as I can not draw the circuit since the editor is not supporting it)
28)Alpha of a transistor=0.99, Ico=1uA, Ie=1 mA, Ic=?
29)If the input given to an inductor is delta(t) (ie: =1 when t=0 and ,=0 otherwise) then the current will be___
(A) infinity (B) -infinity (C) 1 (D) 0
30) For implementing Band pass filter using High pass filter (Cutt off freq=Fh) and Low pass filter (cutt off freq= Fl)_____
(A)Fh=Fl (B) Fh>Fl (C) Fh
Ans: Fh
31)In the Enhancement type MOSFET the gate to source voltage Vs drain current characteristics will be____
Ans: Drain current Increases as Vgs increases in active region
32)In a johnson counter, How many state have to be changed to increment the count from 0100 to 0111?
33)Odd parity generator is____
Ans: XNOR gate
34)A circuit using op-amp was given, the question was to calculate output offset voltage___
Ans: Vo(off)=Vin(off)*(1+Rf/R1)
35)Antialiasing filter is_____
(A) Digital filter (B) Analog filter (C) Can be Analog or digital (D) RC filter

Hello Friends, I have been called for interview in Chennai after shortlisted in written exam  .My branch is CSE.There were 8-9 members in the interview pannel.
After verification of the original certificates the TA will be given to each candidate. My turn was 9th as they were calling according to their rank in written exam.
I entered into the room when my turned, they politely told me to have seat. The chief of member asked me whats your favorite subjects.I told networking,Operating system and software engineering.While i told C they told its not a subject its a language.
One of the member started to ask question from Software Engineering. Questions were like this.......
1. Tell me any one of the life cycle model
2.Give details of the phases in the life cycle model
3.What is cost estimation,Tell me any one. I discussed about COCOMO model while he asked about this model
They asked the formula which is related to the cost estimation.
4.What is verification and validation etc..
And Many more questions they asked.........................
Final question was what is fibonacci series and its application write on the white board.
They didn't ask any question from project however from other students they have asked question from project..



these are few experiences   .........

gain  advantage  of  these experiences  and prepare  well  ......

May  the   best  be  yours..............


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