MICROWIND Tutorial Part 4: Design, Layout and Application of CMOS Buffer

You can get a detailed idea of buffer here

 

 

Here is a logic diagram of buffer. As you can see, it is basically two inverters connected in series. This but obiviously results in no change in the output. (Complement of Complemented signal is the original signal). Then why use it?

 

Not all the time in a circuit we connect Vdd(Poser supply) to each and every node. This is because they dont need it. (because of the design). So, after a certain length of devices, the logic levels starts degrading. The high level starts reducing from that of Vdd value. Such a degradation causes noisy output and many error. Therefore the signal needs boosting. This boosting is provided by the buffer. 

In few circuits, it can be used to hold the value of a signal for certain duration.

It is used and a separation element between two different circuitry to eliminate cross talk or unwanted noise.

Enough of applications? If you need more, comment to this article. I will be glad to post few more.

I will not be going in much detail regarding the layout of the buffer. You can reffer to part 2 (design of the inverter) to get a detailed design viewe of the inverter.

 

I will be just posting the steps and the final layout.

 

Step1: (Not open the favourite Microwind window..blah blah blah)

Make a copy of the inverter circuit which you have drawn. Open the copy Microwind>File>Open. Browse to the layout and open it.

You have got one inverter. We need the next one.

 

 

Step 2:

Shortcut 1: Import an inverter. Go to File>Insert Layout browse to the inverter and import it.

Shortcut 2: In the top menu, click on Copy element. Drag the mouse holding the left button over the layout till its completely selected. Release left mouse button. You should be able to see a dotted layout exactly same as the one you have just copied. Place it away. If you happen to commit a mistake, Ctrl+U will undo it. :). The recommended spacing between them is 7lambda. You may do DRC once to find the exact spacing.

 

 

Step3:

Routing:

Ahem. Forgot to write almost final step :). Yes, we are almost done (again).

Here we will be using Vdd and Vss for both the inverters. This is as good as supplying 2 power supplies. For example, we have a single UPS for the whole computer. This is like supplying separate UPS for monitor and CPU.

We are not that rich, or are we?:).

So, what we do is draw single rail at the top of the layout, and give a single Vdd to it. Later, we can tap Vdd from it. We do the same for Vss.

Now, we need to connect the output of the first inverter to the input of the second. This can be done in two ways. Using polysilicon (because the distance is less, if the distance is more, it introduces unnecessary patasitics) or using metal.

 

I have used metal. Connect the layers. Do the dew( I mean DRC). Thats it. The layout should look something like this:

 

Press the simulation button. You should get the waveforms as shown in the fugure. If you dont, check the contacts and debug it. All the best.

 

Have a cup of coffe and be ready for the next session.

See you soon.

Keep watching this space for more.

Have a nice day.